Robert K. Brayton

Synthesis of Finite State Machines

Functional Optimization

Synthesis of Finite State Machines: Functional Optimization is one of two monographs devoted to the synthesis of Finite State Machines (FSMs). This vo...

Synthesis of Finite State Machines

Logic Optimization

Synthesis of Finite State Machines: Logic Optimization is the second in a set of two monographs devoted to the synthesis of Finite State Machines (FSM...

The Unknown Component Problem

Theory and Applications

The Problem of the Unknown Component: Theory and Applications addresses the issue of designing a component that, combined with a known part of a syste...

Synthesis of Finite State Machines

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Synthesis of Finite State Machines

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Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design

Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design discusses new approaches to better timing-closure and manufacturability of DSM Integrated...

Logic Synthesis for Field-Programmable Gate Arrays

Short turnaround has become critical in the design of electronic systems. Software- programmable components such as microprocessors and digital signal...

Logic Minimization Algorithms for VLSI Synthesis

The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson...

Timed Boolean Functions

A Unified Formalism for Exact Timing Analysis

Timing research in high performance VLSI systems has advanced at a steady pace over the last few years, while tools, especially theoretical mechanisms...

Integrating Functional and Temporal Domains in Logic Design

The False Path Problem and Its Implications

This book is an extension of one author's doctoral thesis on the false path problem. The work was begun with the idea of systematizing the various sol...

Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics

This book was motivated by the problems being faced with shrinking IC process feature sizes. It is well known that as process feature sizes shrink, a ...

Logic Minimization Algorithms for VLSI Synthesis

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Sensitivity and Optimization

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